StefansE
|
9df15549c0
|
Works fine with NV RAM
|
2026-04-03 22:16:43 +02:00 |
|
StefansE
|
377c5c74fd
|
PWM timming correction - TIM2
|
2026-04-03 22:08:13 +02:00 |
|
StefansE
|
ae5cafbd67
|
Initilizing with NV values not working - mixed colours
|
2026-04-03 19:31:04 +02:00 |
|
StefansE
|
ff3bc0ca71
|
Cleanup after merge
|
2026-04-03 19:13:28 +02:00 |
|
StefansE
|
05abd8354a
|
Merge branch 'ds1307_NVRAM'
|
2026-04-03 19:03:28 +02:00 |
|
StefansE
|
48e899af5b
|
NV-RAM works again
|
2026-04-03 15:51:14 +02:00 |
|
StefansE
|
1aef3ea2ab
|
Writing NVM not working
|
2026-04-03 15:27:34 +02:00 |
|
StefansE
|
3bab7eda33
|
Architecture cleanup
|
2026-03-29 16:26:57 +02:00 |
|
StefansE
|
cd2662eceb
|
DMA NVIC priority increase.
|
2026-03-29 13:39:14 +02:00 |
|
StefansE
|
b5000adf0e
|
Wrong display
|
2026-03-29 13:03:24 +02:00 |
|
StefansE
|
21874c4455
|
Working with CDC
|
2026-03-28 19:42:11 +01:00 |
|
StefansE
|
695b0340ad
|
Working assembly
|
2026-03-28 18:01:53 +01:00 |
|
StefansE
|
4236a9293e
|
MinSec deveder works OK. UART OK.
|
2026-03-28 11:32:32 +01:00 |
|
StefansE
|
2c4eedfc60
|
Struggling with UART
|
2026-03-28 10:00:00 +01:00 |
|
StefansE
|
e6e97f0412
|
UART commands work
|
2026-03-27 19:40:53 +01:00 |
|
StefansE
|
ba8855eb21
|
Clock working, I2C communication to be proven
|
2026-03-26 19:26:58 +01:00 |
|
StefansE
|
6b3f588fb0
|
UART added
|
2026-03-26 15:32:14 +01:00 |
|
StefansE
|
53269db9a6
|
RTC works, 5V needed
|
2026-03-26 15:14:28 +01:00 |
|
StefansE
|
82dfb42b67
|
Added ds1307 RTC drivers
|
2026-03-26 11:27:17 +01:00 |
|
StefansE
|
5a4d46bbba
|
Effects added :-)
|
2026-03-25 19:06:44 +01:00 |
|
StefansE
|
7aea97a648
|
Working leds
|
2026-03-25 18:01:12 +01:00 |
|
StefansE
|
bc45041179
|
Working TIM2
|
2026-03-25 16:12:57 +01:00 |
|
StefansE
|
47a0228f41
|
Initial commit
|
2026-03-25 12:34:31 +01:00 |
|